bibliographer - Paritosh K. Pandya

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Logics Meet 2-Way 1-Clock Alternating Timed Automata Shankara Narayanan Krishna Khushraj Nanik Madnani Manuel Jr. Mazo Paritosh K. Pandya [github]

Two-variable logics with some betweenness relations: Expressiveness, satisfiability and membership Andreas Krebs Kamal Lodaya Paritosh K. Pandya Howard Straubing [github]

Timed Automata with Integer Resets: Language Inclusion and Expressiveness P. Vijay Suman Paritosh K. Pandya Shankara Narayanan Krishna Lakshmi Manasa [github]

Logics Meet 1-Clock Alternating Timed Automata Shankara Narayanan Krishna Khushraj Madnani Paritosh K. Pandya [github]

Making Metric Temporal Logic Rational Shankara Narayanan Krishna Khushraj Madnani Paritosh K. Pandya [github]

Unambiguity in Timed Regular Languages: Automata and Logics Paritosh K. Pandya Simoni S. Shah [github]

Library Size: 13G (6 entries), Last Updated: Apr 04, 2026, 18:14:59, Build Time: N/A

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